Quiz: AI Accelerators, HBM & System Integration (Part 7)

10 questions from Part 7 of the guide. Score instantly; every explanation links to the chapter that derives the answer.

The four accelerator families the guide designs around are…
CPU, GPU, FPGA, DSPmerchant GPU, systolic-array TPU, hyperscaler custom XPU, and inference ASICx86, Arm, RISC-V, MIPSconsumer, workstation, server, mobile
In 2026, accelerator selection is governed less by FLOPS than by…
clock speeddelivered HBM bandwidth and capacity — for LLM serving the memory system IS the producttransistor countdie size
The HBM supply base consists of…
dozens of suppliersthree houses — SK hynix (~50–55%), Samsung (~25–30%), Micron — with 2026 output pre-bookedone supplier onlycommodity DRAM fabs switching freely
The precision ladder decision (BF16 → FP8 → FP6 → FP4) matters because…
lower precision is always bettereach step roughly doubles effective compute and halves memory — if the workload's accuracy budget tolerates itit only affects storageregulators mandate FP8
The rack-standard fork the facility is built around is…
colors of the rack19-inch EIA-310 vs 21-inch OCP ORV3 vs Open Rack Wide — busbars, power shelves, and service clearances all followlocking vs open doorsany rack fits any hall
The integration-model ladder (DGX turnkey → HGX-from-OEM → ODM-direct → OCP self-design) trades…
nothing; they're identicalmargin and control against engineering burden and support responsibilityonly delivery timeonly paint color
The software-regime commitment (CUDA / ROCm / XLA / Neuron) determines…
nothing portable code can't fixwhich workloads you can serve competitively and how expensive it is to ever leave — the deepest lock-in in the stackonly compile timesthe color of error messages
CoWoS-class advanced packaging matters to operators because…
it changes rack widthit queues at the same upstream gate as HBM — a second, correlated constraint on every accelerator roadmapit's purely cosmeticit eliminates the need for cooling
On-package power delivery is emerging because…
cables look untidyat kW-class chips, converting 48 V to core voltage ON the package (lateral or vertical) cuts the last-millimeter I²R losses that board VRMs can'tit reduces software bugsregulation requires it
For deployment velocity at scale, structured cabling is bought as…
field-terminated fiber, artisanallypre-terminated MPO trunks and modular cassettes — the largest single labor lever in the white spacewireless linkswhatever the electricians prefer

Check your understanding: Compute, Silicon & System Integration