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GuideGlossaryChip-on-Wafer-on-Substrate

Chip-on-Wafer-on-Substrate · CoWoS

TSMC advanced-packaging process integrating compute and memory on an interposer; an upstream supply chokepoint.

Current numbers

~600 kWRubin Ultra Kyber rack (NVL144) on 800 VDC — GTC 2026 also defined NVL576 as an eight-rack MGX system; supply-chain reports (Apr–Jun 2026) say the package was cut to dual-die 2+2 over CoWoS-L warpage, unconfirmed by NVIDIAas of H2 2027 (announced) · register ↗
~336 Btransistors per Rubin GPU (dual-die, 4-reticle CoWoS-L) — 1.6x Blackwell's ~208 Bas of 2026 (announced) · register ↗
~1M wafersTSMC CoWoS 2026 demand ~fully booked; NVIDIA holds ~50–60% of allocationas of 2026 · register ↗

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